Sharp LH79524 - Interrupt Mask Register (MASK); Table 5-29. MASK Register; Table 5-30. MASK Fields

LH79524/LH79525 User’s Guide Direct Memory Access Controller
Version 1.0 5-15
5.2.2.8 Interrupt Mask Register (MASK)
The MASK Register allows enabling and disabling (masking) DMA interrupts. Program
with a 1 to enable, and a 0 to disable individual interrupts.
Table 5-29. MASK Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
MASKE3 MASKE2 MASKE1 MASKE0
MASK3 MASK2 MASK1 MASK0
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RW RW RW RW RW RW RW RW
ADDR 0xFFFE1000 + 0x0F0
Table 5-30. MASK Fields
BIT NAME DESCRIPTION
31:8
/// Reserved Reading returns 0. Write the reset value.
7 MASKE3
Data Stream 3 Error Interrupt
1 = Enables data stream 3 error interrupt
0 = Disables data stream 3 error interrupt
6 MASKE2
Data Stream 2 Error Interrupt
1 = Enables data stream 2 error interrupt
0 = Disables data stream 2 error interrupt
5 MASKE1
Data Stream 1 Error Interrupt
1 = Enables data stream 1 error interrupt
0 = Disables data stream 1 error interrupt
4 MASKE0
Data Stream 0 Error Interrupt
1 = Enables data stream 0 error interrupt
0 = Disables data stream 0 error interrupt
3 MASK3
Data Stream 3 Interrupt
1 = Enables data stream 3 interrupt
0 = Disables data stream 3 interrupt
2 MASK2
Data Stream 2 Interrupt
1 = Enables data stream 2 interrupt
0 = Disables data stream 2 interrupt
1 MASK1
Data Stream 1 Interrupt
1 = Enables data stream 1 interrupt
0 = Disables data stream 1 interrupt
0 MASK0
Data Stream 0 Interrupt
1 = Enables data stream 0 interrupt
0 = Disables data stream 0 interrupt