Color Liquid Crystal Display Controller LH79524/LH79525 User’s Guide
4-34 Version 1.0
4.5.3.10 Interrupt Clear Register (INTCLR)
Writing a 1 to an active bit in this register causes that interrupt to be cleared. This is a write-
only register.
Table 4-32. INTCLR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
CMBEI
CVCI
CBUI
CFUI
///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO WO WO WO WO RO
ADDR 0xFFFF4000 + 0x24
Table 4-33. INTCLR Fields
BIT NAME DESCRIPTION
31:5 /// Reserved Reading returns 0. Write the reset value.
4 CMBEI
Clear Masked AHB Master Error Interrupt
1 = Interrupt cleared
0 = No change
3CVCI
Clear Masked Vertical Compare Interrupt
1 = Interrupt cleared
0 = No change
2CBUI
Clear Masked LCD Next Base Address Update Interrupt
1 = Interrupt cleared
0 = No change
1CFUI
Clear Masked FIFO Underflow Interrupt
1 = Interrupt cleared
0 = No change
0 /// Reserved Reading returns 0. Write the reset value.