Sharp LH79524 - Register Reference; Table 15-1. Timer 0 Register Summary; Table 15-2. Timer 1 Register Summary; Table 15-3. Timer 2 Register Summary

Timers LH79524/LH79525 User’s Guide
15-6 Version 1.0
15.2 Register Reference
This section describes the location and programming of the Timer registers.
15.2.1 Memory Map
Register offsets in Table 15-1 are relative to the Timer base address 0xFFFC4000.
Table 15-1. Timer 0 Register Summary
ADDRESS
OFFSET
NAME DESCRIPTION
0x00 CTRL0 Timer 0 Control Register
0x04 CMP_CAP_CTRL Timer 0 Compare/Capture Control Register
0x08 INTEN0 Timer 0 Interrupt Control Register
0x0C STATUS0 Timer 0 Status Register
0x10 CNT0 Timer 0 Counter Register
0x14 T0CMP0 Timer 0 Compare Register 0
0x18 T0CMP1 Timer 0 Compare Register 1
0x1C T0CAPA Timer 0 Capture Register A
0x20 T0CAPB Timer 0 Capture Register B
0x24 T0CAPC Timer 0 Capture Register C
0x28 T0CAPD Timer 0 Capture Register D
0x2C T0CAPE Timer 0 Capture Register E
Table 15-2. Timer 1 Register Summary
ADDRESS
OFFSET
NAME DESCRIPTION
0x30 CTRL1 Timer 1 Control Register
0x34 INTEN1 Timer 1 Interrupt Control Register
0x38 STATUS1 Timer 1 Status Register
0x3C CNT1 Timer 1 Counter Register
0x40 T1CMP0 Timer 1 Compare Register 0
0x44 T1CMP1 Timer 1 Compare Register 1
0x48 T1CAPA Timer 1 Capture Register A
0x4C T1CAPB Timer 1 Capture Register B
Table 15-3. Timer 2 Register Summary
ADDRESS
OFFSET
NAME DESCRIPTION
0x50 CTRL2 Timer 2 Control Register
0x54 INTEN2 Timer 2 Interrupt Control Register
0x58 STATUS2 Timer 2 Status Register
0x5C CNT2 Timer 2 Counter Register
0x60 T2CMP0 Timer 2 Compare Register 0
0x64 T2CMP1 Timer 2 Compare Register 1
0x68 T2CAPA Timer 2 Capture Register A
0x6C T2CAPB Timer 2 Capture Register B