Sharp LH79524 - Table 11-22. MUXCTL7 Register; Table 11-23. MUXCTL7 Fields; Multiplexing Control 7 Register (MUXCTL7)

I/O Configuration LH79524/LH79525 User’s Guide
11-14 Version 1.0
11.2.2.11 Multiplexing Control 7 Register (MUXCTL7)
The MUXCTL7 Register allows software to configure a number of LH79524/LH79525 pins.
Table 11-22. MUXCTL7 Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
RESET 0000000000000000
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
ADDR 0xFFFE5000 + 0x30
Table 11-23. MUXCTL7 Fields
BIT NAME DESCRIPTION
31:16 /// Reserved Reading returns 0. Write the reset value.
15:14 PC7
PC7/A23/nFRE Assignment
00 = PC7
01 = A23
10 = nFRE
11 = Reserved
13:12 PC6
PC6/A22/nFWE Assignment
00 = PC6
01 = A22
10 = nFWE
11 = Reserved
11:10 PC5
PC5/A21 Assignment
00 = PC5
01 = A21
10 = Reserved
11 = Reserved
9:8 PC4
PC4/A20 Assignment
00 = PC4
01 = A20
10 = Reserved
11 = Reserved
7:6 PC3
PC3/A19 Assignment
00 = PC3
01 = A19
10 = Reserved
11 = Reserved