Sharp LH79524 - Dynamic Memory Active to Active Command Period Register (DYNACTCMD); Table 7-35. DYNACTCMD Register; Table 7-36. DYNACTCMD Fields

External Memory Controller LH79524/LH79525 User’s Guide
7-42 Version 1.0
7.5.2.13 Dynamic Memory Active to Active Command
Period Register (DYNACTCMD)
The Dynamic Memory Active to Active Command Period Register enables programming
the Active to Active Command Period, tRC. This value is normally found in SDRAM data
sheets as tRC.
Note that tRC is programmable only for memory accesses in the same bank. For accesses
between banks, tRC is fixed at 432 nS and the value in this register is ignored.
This register must only be modified during system initialization, or when there are
no current or outstanding transactions. Software can ensure that there are no current or
outstanding transactions by waiting until the memory controller is idle, then entering
Low-Power Mode (CONTROL:MODE = 1), or Disable Mode (CONTROL:ENABLE = 0).
When in these two modes, external memory access is not allowed, ensuring that
changing parameters will not corrupt external data. Low-Power Mode automatically
refreshes SDRAM; Disable Mode requires commanding the SDRAM to Self Refresh
(DYNMCTRL:SR = 1) prior to entering Disable.
Table 7-35. DYNACTCMD Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
TYPE RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD /// tRC
RESET 0000000000011111
TYPE RO RO RO RO RO RO RO RO RO RO RO RW RW RW RW RW
ADDR 0xFFFF1000 + 0x048
Table 7-36. DYNACTCMD Fields
BITS NAME FUNCTION
31:5 /// Reserved Reading returns 0. Write the reset value.
4:0 tRC
Active to Active Command Period
Period = (tRC + 1) External Memory Clock periods