Sharp LH79524 - Interrupt Clear Register (CLR); Table 5-31. CLR Register; Table 5-32. CLR Fields

Direct Memory Access Controller LH79524/LH79525 User’s Guide
5-16 Version 1.0
5.2.2.9 Interrupt Clear Register (CLR)
The Interrupt Clear Register clears the status flags. Writing a 1 to a bit clears the interrupt
status bit in the STATUS register. This register has an indeterminate value after Reset.
Table 5-31. CLR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET ————————————————
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
CLEARE3 CLEARE2 CLEARE1 CLEARE0
CLEAR3 CLEAR2 CLEAR1 CLEAR0
RESET ————————————————
RW RO RO RO RO RO RO RO RO WO WO WO WO WO WO WO WO
ADDR 0xFFFE1000 + 0x0F4
Table 5-32. CLR Fields
BIT NAME DESCRIPTION
31:8
/// Reserved Reading returns 0. Write the reset value.
7 CLEARE3
Clear ErrorInt3 Flag
1 = Clears the ERRORINT3 interrupt flag in the Status Register
0 = No effect
6 CLEARE2
Clear ErrorInt2 Flag
1 = Clears the ERRORINT2 interrupt flag in the Status Register
0 = No effect
5 CLEARE1
Clear ErrorInt1 Flag
1 = Clears the ERRORINT1 interrupt flag in the Status Register
0 = No effect
4 CLEARE0
Clear ErrorInt0 Flag
1 = Clears the ERRORINT0 interrupt flag in the Status Register
0 = No effect
3 CLEAR3
Clear Int3 Flag
1 = Clears the INT3 interrupt flag in the Status Register
0 = No effect
2 CLEAR2
Clear Int2 Flag
1 = Clears the INT2 interrupt flag in the Status Register
0 = No effect
1 CLEAR1
Clear Int1 Flag
1 = Clears the INT1 interrupt flag in the Status Register
0 = No effect
0 CLEAR0
Clear Int0 Flag
1 = Clears the INT0 interrupt flag in the Status Register
0 = No effect