Sharp LH79524 - Table 15-38. T2 Cmpn Registers; Table 15-39. T2 Cmpn Register Definitions; Timer 2 Compare Registers (T2 Cmpn)

LH79524/LH79525 User’s Guide Timers
Version 1.0 15-27
15.2.2.18 Timer 2 Compare Registers (T2CMPn)
There are two T2CMPn Registers for Timer 2. They are designated:
•T2CMP0
•T2CMP1
Each register is a 16-bit, Read/Write register. Contents of these registers are compared
continuously with the counter CNT2. When both register and counter values match, the
timer behaves as programmed in the CTRL2 register.
Table 15-38. T2CMPn Registers
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD TM2CMP
RESET 1111111111111111
RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW
ADDR
T2CMP0: 0xFFFC4000 + 0x60
T2CMP1: 0xFFFC4000 + 0x64
Table 15-39. T2CMPn Register Definitions
BITS NAME DESCRIPTION
31:16 ///
Reserved Reading this field returns 0. Write the reset value.
15:0 TM2CMP Timer 2 Compare 16-bit Compare Register Value.