Sharp LH79524 - Interrupt Clear Register (ICR); Table 10-13. ICR Register; Table 10-14. ICR Register Definitions

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S Converter LH79524/LH79525 User’s Guide
10-20 Version 1.0
10.2.2.6 Interrupt Clear Register (ICR)
This register is write only. Writing 1 causes the corresponding interrupt to be cleared.
Writing 0 has no effect. The value written cannot be read back.
Table 10-13. ICR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
SSPPEC
ECPEC
TXUEC
///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO WO WO WO RO RO RO RO
ADDR 0xFFFC8000 + 0x014
Table 10-14. ICR Register Definitions
BITS NAME DESCRIPTION
31:7 /// Reserved Reading returns 0. Write the reset value.
6 SSPPEC SSP Protocol Error interrupt clear Clears the SSP Protocol Error Interrupt.
5ECPEC
External Codec Protocol Error interrupt clear Clears the External Codec
Protocol Error Interrupt.
4 TXUEC
Transmit Underrun Error interrupt clear Clears the Transmit Underrun Er-
ror Interrupt.
3:0 /// Reserved (see SSP ICR register)