Watchdog Timer LH79524/LH79525 User’s Guide
19-8 Version 1.0
19.2.2.4 Current Watchdog Count Registers (COUNT[3:0])
The COUNTx registers, described in Table 19-8 and Table 19-9, are a set of registers
operating as a cascaded counter, reporting the current WDT decrementing value:
• COUNT3 contains bits 31 through 24 of the current value
• COUNT2 contains bits 23 through 16 of the current value
• COUNT1 contains bits 15 through 8 of the current value
• COUNT0 contains bits 7 through 0 of the current value.
When all of COUNT[3:0] are 0x00, the WDT has timed out.
Table 19-8. COUNTx Description
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
TYPE RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD /// COUNT
RESET 0000000000000001
TYPE RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
ADDR
COUNT0 = 0xFFFE3000 + 0x0C
COUNT1 = 0xFFFE3000 + 0x10
COUNT2 = 0xFFFE3000 + 0x14
COUNT3 = 0xFFFE3000 + 0x18
Table 19-9. COUNTx Fields
BIT NAME DESCRIPTION
31:8 /// Reserved Reading this field returns 0. Write the reset value.
7:0 COUNT
Current Count This byte corresponds to the bit position of the entire 32-bit
WDT count, as described (e.g. for COUNT3, this is the most-significant byte).
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