Sharp LH79524 - External Interrupt Clear Register (INTCLR); Table 13-48. INTCLR Register; Table 13-49. INTCLR Fields

LH79524/LH79525 User’s Guide Reset, Clock, and Power Controller
Version 1.0 13-31
13.2.2.20 External Interrupt Clear Register (INTCLR)
This register individually clears active external interrupts. This register can clear edge-
triggered interrupts only. Writing to undefined bits has no effect on the RCPC. Note that
the reset state is indeterminate since this is write only.
Table 13-48. INTCLR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET ————————————————
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ///
INT
7
INT
6
INT
5
INT
4
INT
3
INT
2
INT
1
INT
0
RESET ————————————————
RW RO RO RO RO RO RO RO RO WO WO WO WO WO WO WO WO
ADDR 0xFFFE2000 + 0x84
Table 13-49. INTCLR Fields
BITS NAME DESCRIPTION
31:8 /// Reserved Reading is indeterminate. Write the reset value.
7INT7
Clear INT7 Interrupt
1 = Clears the active edge-triggered interrupt INT7
0 = No effect
6INT6
Clear INT6 Interrupt
1 = Clears the active edge-triggered interrupt INT6
0 = No effect
5INT5
Clear INT5 Interrupt
1 = Clears the active edge-triggered interrupt INT5
0 = No effect
4INT4
Clear INT4 Interrupt
1 = Clears the active edge-triggered interrupt INT4
0 = No effect
3INT3
Clear INT3 Interrupt
1 = Clears the active edge-triggered interrupt INT3
0 = No effect
2INT2
Clear INT2 Interrupt
1 = Clears the active edge-triggered interrupt INT2
0 = No effect
1INT1
Clear INT1 Interrupt
1 = Clears the active edge-triggered interrupt INT1
0 = No effect
0INT0
Clear INT0 Interrupt
1 = Clears the active edge-triggered interrupt INT0
0 = No effect