Sharp LH79524 - Results Register (RR); Table 2-7. RR Register; Table 2-8. RR Fields

Analog-to-Digital Converter/Brownout Detector LH79524/LH79525 User’s Guide
2-14 Version 1.0
2.2.2.3 Results Register (RR)
RR is the Results register. This register contains the oldest entry of the 16-entry × 16-bit
wide result FIFO. Its index in the FIFO’s memory array is contained in the Read Pointer
(RDPTR) bit field in the FIFO Status Register (see Section 2.2.2.9). This register contains
the 10-bit ADC output and the 4-bit tag number from the Control Bank State Machine.
When the FIFO is full, further data writes are temporarily blocked until at least one location
is available for a write. Reading from RR removes the oldest entry from the result FIFO and
increments the RDPTR.
Table 2-7. RR Register
BIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FIELD ///
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
BIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
FIELD ADCOUT /// CBTAG
RESET 0000000000000000
RW RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO RO
ADDR 0xFFFC3000 + 0x08
Table 2-8. RR Fields
BIT NAME DESCRIPTION
31:16
/// Reserved Reading returns 0. Write the reset value.
15:6 ADCOUT ADC Output Contains the 10-bit digital output of the ADC.
5:4 /// Reserved Reading returns 0. Write the reset value.
3:0 CBTAG
Control Bank Tag Specifies the entry number (HWCTRLBxx or
LWCTRLBxx) of the Control bank. The entry number (x) ranges from 0 to
15, corresponding to the conversion associated with the bit result.