Sharp LH79524 - Page 25

List of Tables LH79524/LH79252 User’s Guide
xxiv Version 1.0
Table 6-81. SPECAD1BOT Fields ...........................................................................6-50
Table 6-82. SPECAD1TOP Register........................................................................6-50
Table 6-83. SPECAD1TOP Fields ...........................................................................6-50
Table 6-84. SPECAD2BOT Register........................................................................6-51
Table 6-85. SPECAD2BOT Fields ...........................................................................6-51
Table 6-86. SPECAD2TOP Register........................................................................6-51
Table 6-87. SPECAD2TOP Fields ...........................................................................6-51
Table 6-88. SPECAD3BOT Register........................................................................6-52
Table 6-89. SPECAD3BOT Fields ...........................................................................6-52
Table 6-90. SPECAD3TOP Register........................................................................6-52
Table 6-91. SPECAD3TOP Fields ...........................................................................6-52
Table 6-92. SPECAD4BOT Register........................................................................6-53
Table 6-93. SPECAD4BOT Fields ...........................................................................6-53
Table 6-94. SPECAD4TOP Register........................................................................6-53
Table 6-95. SPECAD4TOP Fields ...........................................................................6-53
Table 6-96. IDCHK Register.....................................................................................6-54
Table 6-97. TypeIDCheck Fields..............................................................................6-54
Chapter 7 – External Memory Controller
Table 7-1. Static Memory Configurations.................................................................7-10
Table 7-2. Boot Configuration for Silicon Version A.0..............................................7-18
Table 7-3. Boot Configuration for Silicon Version A.1..............................................7-18
Table 7-4. 16-bit Address Mapping..........................................................................7-20
Table 7-5. 32-bit Wide Data Bus Address Mapping, SDRAM (RBC) .......................7-22
Table 7-6. 32-bit Wide Data Bus Address Mapping, SDRAM (BRC) .......................7-23
Table 7-7. 16-bit Wide Data Bus Address Mapping, SDRAM (RBC) .......................7-25
Table 7-8. 16-bit Wide Data Bus Address Mapping, SDRAM (BRC) .......................7-26
Table 7-9. Memory System Examples .....................................................................7-27
Table 7-10. External Memory Controller Register Summary....................................7-28
Table 7-11. CONTROL Register ..............................................................................7-30
Table 7-12. CONTROL Fields..................................................................................7-30
Table 7-13. STATUS Register..................................................................................7-31
Table 7-14. STATUS Fields .....................................................................................7-31
Table 7-15. CONFIG Register..................................................................................7-32
Table 7-16. CONFIG Fields......................................................................................7-32
Table 7-17. DYNMCTRL Register............................................................................7-33
Table 7-18. DYNMCTRL Fields................................................................................7-33
Table 7-19. DYNMREF Register..............................................................................7-34
Table 7-20. DYNMREF Fields..................................................................................7-34
Table 7-21. DYNMRCON Register...........................................................................7-35
Table 7-22. DYNMRCON Fields ..............................................................................7-35
Table 7-23. PRECHARGE Register.........................................................................7-36
Table 7-24. PRECHARGE Fields.............................................................................7-36
Table 7-25. DYNM2PRE Register............................................................................7-37
Table 7-26. DYNM2PRE Fields................................................................................7-37
Table 7-27. REFEXIT Register.................................................................................7-38
Table 7-28. REFEXIT Fields ....................................................................................7-38
Table 7-29. DOACTIVE Register .............................................................................7-39