Sharp LH79524 - Page 34

LH79524/LH79252 User’s Guide
Version 1.0 xxxiii
Table 17-40. OUTCOUNT0 Register .....................................................................17-30
Table 17-41. OUTCOUNT0 Fields .........................................................................17-30
Table 17-42. OUTCOUNT1 Register .....................................................................17-30
Table 17-43. OUTCOUNT1 Fields .........................................................................17-30
Table 17-44. OUTCOUNT2 Register .....................................................................17-31
Table 17-45. OUTCOUNT2 Fields .........................................................................17-31
Table 17-46. FIFO Register....................................................................................17-31
Table 17-47. COUNT1 Fields.................................................................................17-31
Table 17-48. INTR Register ...................................................................................17-32
Table 17-49. INTR Fields .......................................................................................17-32
Table 17-50. CNTLx Register.................................................................................17-33
Table 17-51. CNTLx Fields ....................................................................................17-33
Table 17-52. ADDRx Register................................................................................17-34
Table 17-53. ADDRx Fields....................................................................................17-34
Table 17-54. COUNTx Register .............................................................................17-34
Table 17-55. COUNTx Fields.................................................................................17-34
Chapter 18 – Vectored Interrupt Controller
Table 18-1. Interrupt Assignments ...........................................................................18-2
Table 18-2. VIC Register Summary .........................................................................18-5
Table 18-3. IRQSTATUS Register ...........................................................................18-6
Table 18-4. IRQSTATUS Fields...............................................................................18-6
Table 18-5. FIQSTATUS Register............................................................................18-7
Table 18-6. FIQSTATUS Fields ...............................................................................18-7
Table 18-7. RAWINTR Register...............................................................................18-7
Table 18-8. RAWINTR Fields...................................................................................18-7
Table 18-9. INTSELECT Register............................................................................18-8
Table 18-10. INTSELECT Fields..............................................................................18-8
Table 18-11. INTENABLE Register..........................................................................18-8
Table 18-12. INTENABLE Fields..............................................................................18-8
Table 18-13. INTENCLEAR Register.......................................................................18-9
Table 18-14. INTENCLEAR Fields...........................................................................18-9
Table 18-15. SOFTINT Register ............................................................................18-10
Table 18-16. SOFTINT Fields ................................................................................18-10
Table 18-17. SOFTINTCLEAR Register ................................................................18-11
Table 18-18. SOFTINTCLEAR FIelds....................................................................18-11
Table 18-19. VECTADDR Register........................................................................18-12
Table 18-20. VECTADDR Fields............................................................................18-12
Table 18-21. DEFVECTADDR Register.................................................................18-12
Table 18-22. DEFVECTADDR Fields.....................................................................18-12
Table 18-23. VECTADDRx Registers ....................................................................18-13
Table 18-24. VECTADDRx Fields..........................................................................18-13
Table 18-25. VECTCTRLx Registers .....................................................................18-14
Table 18-26. VECTCTRLx Fields...........................................................................18-14
Table 18-27. ITOP Register ...................................................................................18-15
Table 18-28. ITOP Fields .......................................................................................18-15