IBM PowerPC 405GP User Manual

3.3.10 Memory-Mapped Input/Output Registers
Some registers associated with on-chip peripherals are memory-mapped input/output (MMIO)
registers. Such registers are mapped into the system memory space and are accessed using
load/store instructions.
3.3.10.1 Directly Accessed MMIO Registers
Directly-accessed MMIO registers are accessed using load/store instructions that contain the register
addresses.
Table 3-13 lists,the directly-accessed MMIO registers.
Table 3-13. Directly Accessed MMIO Registers
Register
Address Access
Description
MMIO Registers Used for Indirect Access
PCICO_CFGADDR
OxEECOOOOO RIW PCI Configuration Address Register
PCICO_CFGDATA
OxEECOOOO4 RIW PCI Configuration Data Register
PCI-to-PLB
Bridge
PCILO_PMMOLA
OxEF400000 RIW PMM 0 Local
Address
PCILO_PMMOMA
OxEF400004 RIW
PMM 0
Mask/Attribute
PCILO_PMMOPCILA OxEF400008 RIW
PMM 0 PCI
Low Address
PCILO_PMMOPCIHA
OxEF40000C RIW
PMM 0 PCI
High Address
PCILO_PMM1 LA
OxEF400010 RIW
PMM
1 Local Address
PCILO_PMM1 MA
OxEF400014 RIW PMM 1 Mask/Attribute
PCILO_PMM1 PCILA
OxEF400018 RIW PMM
1 PCI Low Address
PCILO_PMM1 PCIHA
OxEF40001C RIW
PMM
1 PCI High Address
PCILO_PMM2LA
OxEF400020 RIW PMM
2 Local Address
PCILO_PMM2MA
OxEF400024 RIW PMM
2 Mask/Attribute
PCILO_PMM2PCILA
OxEF400028
RIW
PMM
2 PCI Low Address
PCILO_PMM2PCIHA
OxEF40002C RIW PMM
2 PCI High Address
PCILO_PTM1 MS
OxEF400030 RIW PTM
1 Memory Size
PCILO_PTM1
LA
OxEF400034 RIW PTM 1 Local Address
PCILO_PTM2MS
OxEF400038 RIW
PTM
2 Memory Size
PCILO_PTM2LA
OxEF40003C RIW
PTM
2 Local Address
Serial Ports
UARTO_RBR
OxEF600300
R UART 0 Receiver Buffer Register
Note: Set UARTO_LCR[DLAB] = 0 to access.
UARTO_THR
W
UART
0 Transmitter Holding Register
Note: Set UARTO_LCR[DLAB] = 0 to access.
UARTO_DLL
RIW UART 0 Baud-rate Divisor Latch LSB
Note: Set UARTO_LCR[DLAB] = 1 to access.
UARTO_IER
OxEF600301 RIW
UART 0 Interrupt Enable Register
Note: Set UARTO_LCR[DLAB] = 0 to access.
UARTO_DLM
RIW
UART 0 Baud-rate Divisor Latch MSB
Note: Set UARTO_LCR[DLAB] = 1 to access.
UARTO_"R
OxEF600302
R
UART
0 Interrupt Identification Register
UARTO_FCR
OxEF600302
W'
UART 0 FIFO Control Register
UARTO_LCR
OxEF600303 RIW
UART 0 Line Control Register
3-22 PPC405GP User's Manual
Preliminary

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English