IBM PowerPC 405GP User Manual

1. Write the offset from Table 14-2 to the Decompression Controller Address Register
(DCPO_CFGADDR).
2. Read data from or write data to the Decompression Controller Data Register (DCPO_CFGDATA).
Table 14-1. DCRs Used to Access the Decompression Controller Registers
DCR
Register
Address Access
Description
DCPO_CFGADDR
Ox014
R/w
Decompression Controller Address Register
DCPO_CFGDATA
Ox015 R/w
Decompression Controller Data Register
Table 14-2. Offsets for Decompression Controller Registers
Register Offset R/W
Description
DCPO_ITORO OxOO R/W
Index Table Origin Register 0
DCPO_ITOR1
Ox01 R/W
Index Table Origin Register 1
DCPO_ITOR2 Ox02 R/W
Index Table Origin Register 2
DCPO_ITOR3 Ox03 R/W
Index Table Origin Register 3
DCPO_ADDRO Ox04 R/w
Address Decode Definition Register 0
DCPO_ADDR1
Ox05
R/w
Address Decode Definition Register 1
DCPO_CFG Ox40 R/w
Decompression Controller Configuration Register
DCPO_ID Ox41
R
Decompression
Controller 10 Register
DCPO_VER Ox42
R
Decompression
Controller Version Register
DCPO_PLBBEAR Ox50
R
Bus Error Address Register
(PLB)
DCPO_MEMBEAR
Ox51 R
Bus Error Address Register (EBC/SDRAM)
DCPO_ESR Ox52 R/Clear
Bus Error Status Register 0 (Masters 0-3)
DCPO_RAMO- Ox400-Ox7FF R/w SRAM/ROM Read/Write
DCPO_RAM3FF
14.2.1 Index Table Origin Registers (DCPO_ITORO-DCPO_ITOR3)
DCPOJTORO-DCPO_ITOR3 each contain the high-order address bits of the index table for a
compression region.
ITO
1
0
201
21
*
Figure 14-1. Decompression Index Table Origin Registers (DCPO_ITORO-DCPO_ITOR3)
0:20 Reserved
21 :31 Index Table Origin High-order index table address bits
14-4
PPC405GP User's Manual
Preliminary
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IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English