PMEST
DSEL
PSTAT
*
115114
13
1
12
+- +-
01
2
t
t
DSCAL
PMEEN
Figure 17-54. Power Management Control/Status Register (PCICO_PMCSR)
15
PMEST
The PCI bridge does not support PME#;
therefore,
PMEST is hardwired to
O.
14:13 DSCAL
The PCI bridge does not support data
register; therefore,
DSCAL is hardwired to
ObOO.
12:9 DSEL
The PCI bridge does not support a data
register; therefore,
DSEL is hardwired to
ObOOOO.
8
PMEEN
The
PCI bridge does not support PME
generation; therefore, PMEEN is hardwired
to
O.
7:2 Reserved
Returns
0 when read.
1
:0
PSTAT
Determine the current power state of a
If
software attempts
to
write a value for an
function and sets the function into a new
unsupported power state to
PSTAT,
its value
power state.
does not change. Writing this
fiield may
00
DO
change PCIO_PMSCRR.
01
01
1002
11
03
Hot
17.5.3.34 PMCSR PCI-to-PCI Bridge
Support
Extensions (PCICO_PMCSRBSE)
PCICO_PMCSRBSE is required for all PCI-ta-PCI bridges. The PCI bridge in not a PCI-to-PCI bridge;
therefore, it returns
0 when this register is read.
01
Figure 17-55. PMCSR
PCI
to
PCI
Bridge
Support
Extensions (PCICO_PMCSRBSE)
1
7
:
0 1 PCI to PCI Bridge Support Extensions
Preliminary
PCI Interface
17-51
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