IBM PowerPC 405GP User Manual

17.2 PCI Bridge Functional Blocks
The following sections describe the PCI bridges and the associated arbiter.
17.2.1 PLB-to-PCI Half-Bridge
As shown in Figure 17-2, the 64-bit PLB slave interface and PCI master interface function together as
a
PLB-to-PCI half-bridge to enablePLB master devices to access PCI target devices. The h~lf-bridge
configuration contains a 32-byte write post buffer and a 64-byte read prefetch buffer.
I
PLB Master
I
Ac knowledge Request
~
PLB Slave Interface
Read
I
Write
Prefetch
Post
Buffer
Buffer
PCI Bridge
PCI Master Interface
Ac knowledge
Request
I
PCI Target
I
Figure 17-2. PLB-to-PCI Half-Bridge Block Diagram
17-4
PPC405GP User's Manual Preliminary

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English