CEn
t
1
0
71
8
11112
31
1
Figure 15-12.
ECC
Configuration Register (SDRAMO_ECCCFG)
0:7 Reserved
8:11
CEn ECC Correction Enable for bank
n.
When CEn is set, ECC correction is
o Disabled enabled for bank n (BankSeln). When
1
Enabled
cleared,
the ECC logic ignores the check
bits and passes read data
along
unmodified.
12:31 Reserved
15.4.2 Correctable ECC Errors
During SDRAM memory read operations the ECC logic automatically detects and corrects any single
bit error that occurs within each 32-bit word of SDRAM memory. This includes errors detected during
the read portion of the read-modify-sequence sequence required for
partial (less than 64-bit) SDRAM
writes.
If a correctable ECC error occurs during a memory read the corrected data is returned to the
requesting master. When a
correctable error is detected during the read portion
of
a partial write the
corrected data is combined with the write data and written back to memory with new
ECC check bits.
In
both cases, the memory bank (BankSeln) that caused the error is logged
in
SDRAMO_ECCESR[BKnE] and the byte lane that experienced the correctable error is identified
in
SDRAMO_ECCESR[BLnCE]. Furthermore, the correctable error bit (SDRAMO_ECCESR[CE]) is set
causing an
ECC Correctable Error interrupt to the Universal Interrupt Controller.
The
interrupt
remains active
until software clears SDRAMO_ECCESR[CE].
15.4.3 Uncorrectable ECC Errors
Uncorrectable ECC errors may occur during SDRAM read and SDRAM partial write operations.
An
uncorrectable error detected during a memory read results
in
the data from system memory
(unchanged) being returned to the requesting master. An
uncorrectable error detected on the read
portion of a read-modify-write sequence for an
SDRAM partial write results
in
the data from system
memory (unchanged) being combined with the write data and written back to memory with new
ECC
check bits.
Whenever an
uncorrectable ECC error occurs the errant memory address is captured
in
SDRAMO_BEAR. The error status for the master that initiated the memory operation is logged in
either
SDRAMO_BESRO
or
SDRAMO_BESR1. The memory bank (BanknSel) that experienced the
error is recorded in
SDRAMO_ECCESR[BKnE] and an uncorrectable error is flagged via
SDRAMO_ECCESR[UE].
SDRAM Controller 15-15
To Next Page
Loading...
Need help?
General
