IBM PowerPC 405GP

16.4.3 Device-Paced Burst Read Transfer
Figure 16-9 shows the peripheral interface timing for a device-paced burst read transfer from a burst
enabled (EBCO_BnAP[BME]=1) bank. The transaction begins with the address being driven. If byte
enable mode is enabled for the bank (EBCO_BnAP[BEM]=1) the byte enables are also output
concurrently on
PerWBEO:3. PerCSn then becomes active EBCO_BnAP[CSN] cycles after the
address,
while PerOE goes low EBCO_BnAP[OEN] cycles after PerCSn. The EBC then waits until
EBCO_BnAP[FWT]+
1 cycles have elapsed since the start of the transaction and begins sampling
PerReady.
If device-paced timeouts are disabled (EBCO_CFG[PTD]=O) the EBC waits indefinitely for PerReady to
become active. Otherwise, the
ESC waits only ESCO_CFG[RTC] cycles from the start of the transaction
until logging a timeout error.
If PerReady is sampled active and Sample On Ready is disabled (EBCO_BnAP[SOR]=O) the EBC
waits one more
cycle before sampling read data. The EBC then reads the data bus and the peripheral
error input,
PerErr. If parity checking is enabled (EBCO_BnAP[PEN]=1) the parity is also read.
The next address of the burst is then driven and after
EBCO_BnAP[BWT]+ 1 cycles the EBC waits for
PerReady as described above. The remaining items in the burst are read in this same manner, except
that
PerBLast is active during the last data element. The EBC then drives PerCSn, PerOE and
PerBLast high and waits EBCO_BnAP[TH] cycles before allowing any pending transfers to occur.
Cycle CIOtn\ I I ~\ I I )~ I I )) I I ~tr=
PerClk M u) u--u-ul LrLr1-0 WU1-J) LrLr1-0}+L
. Ii'
PerAddrO:31
::J--~A~d~dr~eS-S~O--~~~A~dd~re~SS~1~r~~A~dd~re-S~S2~,r-~Ad~d~re-ss-n~t::
'CSN: I TH !
~ ~!
~~~~~~--~~----~~~
l ' i
PerCSn
PerRiW ~ 19E~i ' C
I"'If""""""lI' I ! i
PerOE ::J \~~ __ ~~~~ __ ~~ ______ ~ __ ~
. i ! •
PerBLast U 'IL
i
[
perWBEO:3 c..:J C
BEM=O ~~~ __ ~~~ __ ~~~~~~ __ ~~~ __ ~_I~. ~
PerWE D, I U
, I;
[
PerWBEO:3 dr---~BE::-O:::--'---v---'-;B::-;::E:-:-1'---\xr--'-==BE:-:2:---''----'----;:B:::-E-n ----i'(:I:j
BEM=1 -Pe-r-W-E 0 I I ! :c
SOR=O [
SOR=1 [
PerReady
PerReady
PerDataO:31
PerParO:3
~ ~! ~ I ~!
~~~\~i~~:r\--'---~~
I
PerErr ~ __ ---'- __ ---J~.J\-~_'\";;';';':..J""_---'-r..:::.:..:..J'-_"""-.r..=:..::..;.J\-"""---,-
I
Figure 16-9. Device-Paced Burst Read Transfer
16-14 PPC405GP User's Manual