IBM PowerPC 405GP User Manual

Figure 11-4 illustrates the PIT.
10
31
1
Figure 11-4. Programmable Interval Timer (PIT)
Programmed interval remaining
11.2.1 Fixed Interval Timer (FIT)
Number of clocks remaining until the PIT
event
The FIT provides timer interrupts having a repeatable period. The FIT is functionally similar to an
auto-reload PIT, except that only a smaller fixed selection of interrupt periods are available.
The FIT exception occurs on o~ 1 transitions of selected bits from the time base, as shown in
Table 11-2.
Table 11-2. FIT Controls
Period
Period
TCR[FP]
TBL Bit (Time Base Clocks)
(200 Mhz Clock)
0,0 23 2
9
clocks
2.561l
sec
0, 1 19 2
13
clocks 40.961lsec
1,0 15
217 clocks
0.655 msec
1, 1 11
221 clocks
10.49 msec
The TSR[FIS] field logs a FIT exception as a pending interrupt. A FIT interrupt occurs if TCR[FIE] and
MSR[EE] are enabled at the time of the FIT exception. "Fixed Interval Timer (FIT) Interrupt" on
page
10-42 describes register settings during a FIT interrupt.
The interrupt
handler should reset TSR[FIS]. This is done by using mtspr to write a word to the TSR
having a 1 in TSR[FIS] and any other bits to be cleared, and a 0 in all other bits. The data written to
the
TSR is not direct data, but a mask. A 1 clears a bit and a 0 has no effect.
Preliminary
Timer Facilities
11-5

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English