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IBM PowerPC 405GP

IBM PowerPC 405GP
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Chapter 11. Timer Facilities
The PPC405GP provides four timer facilities: a time base, a Programmable Interval Timer (PIT), a
fixed
interval timer (FIT), and a watchdog timer. The PIT is a Special Purpose Register (SPR). These
facilities, which are driven by the same base clock, can, among other things, be used for:
Time-of-day functions
Data logging functions
Peripherals requiring periodic service
Periodic task switching
Additionally, the watchdog timer can help a system to recover from faulty hardware
or
software.
Figure
11-1
shows the relationship of the timers and the clock source to the time base.
]=0
CPCO_CR1
[CETE
CPU
Clock
-~,
I
\
TmrClk
---'-
CPCO_CR1
[CETE]
= 1
Time
Base
(Incrementer)
TBl
(32
bits)
TBU (32
bits)
:':>
0
31
-
[>
0
31
I
. -
..........
- - -
--------------------------
-Bit3
(2
29
clocks)
-
Bit?
(2
25
clocks)
- Bit
11
(2
21
clocks)
} Watchdo
9
Timer
Events
- Bit 15 (2
17
clocks)
r-
Bit
11
(221
clocks)
}
FITEve~ts
I-
Bit 15
(2
17
clocks)
r-
Bit 19
(2
13
clocks)
'-
Bit 23 (2
9
clocks)
PIT (Decrementer)
(32
bits)
-
[>0
31
L
Zero Detect } PIT
Events
Figure 11-1. Relationship
of
Timer Facilities
to
the Time Base
Preliminary
Timer Facilities
11-1

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