IBM PowerPC 405GP User Manual

3.5.1.2 Little Endian Mapping
Structure s is shown mapped little endian.
14 13
12
OxOO
Ox01 Ox02
28 27 26
Ox08 Ox09 OxOA
34
33
32
Ox10 Ox11 Ox12
'E' 'F' 'G'
Ox18 Ox19 Ox1A
I 64
63 62
Ox20 Ox21 Ox22
11
Ox03 Ox04
25
24
OxOB OxOC
31 'A'
Ox13
Ox14
52
Ox1B Ox1C
61
Ox23 Ox24
3.5.2 Support for Little Endian Byte Ordering
Ox05
Ox06 Ox07
23 22 21
OxOD
OxOE OxOF
'B'
'e'
'0'
Ox15 Ox16
Ox17
51
Ox1D Ox1E Ox1F
Ox25 Ox26 Ox27
Except as noted, this book describes the processor as if it operated only in a big endian fashion. In
fact, the IBM PowerPC Embedded Environment also supports little endian operation .
. The PowerPC
little endian mode, defined in the PowerPC Architecture, is not implemented.
3.5.3 Endian (E) Storage Attribute
The end ian (E) storage attribute supports direct connection of the PPC405GP to little end ian
peripherals and to memory containing little endian instructions and data. For every storage reference
(instruction fetch or
load/store access), an E storage attribute is associated with the storage region of
the reference. The E attribute specifies whether that region is organized as big end ian
(E = 0) or little
end ian (E = 1).
When address
translation is enabled (MSR[IR] = 1 or MSR[DR] = 1), the E field in the corresponding
TLB entry
controls the endianness of a memory region. When address translation is disabled
(MSR[IR]
= 0 or MSR[DR] = 0), the SLER controls the endianness of a memory region.
Bytes
in storage that are accessed as little endian are arranged in true little endian format. The
PPC405GP does not support the little endian mode defined in the PowerPC architecture and used in
PPC401 xx and PPC403xx processors. Furthermore, no address modification is performed when
accessing storage regions programmed as
little endian. Instead, the PPC405GP reorders the bytes
as they are transferred between the processor and memory.
The
on-the-fly reversal of bytes in little endian storage regions is handled in one of two ways,
depending on whether the storage access is an instruction fetch
or a data access (load/store). The
following sections describe byte reordering for the two kinds of storage accesses.
3-30
PPC405GP User's Manual
Preliminary

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English