17.5.3.32 Power Management Capabilities (PCICO_PMC)
PCICO_PMC provides information about the capabilities of the function related to power
management. A
value of Ox0202 indicates no specific capabilities.
PMES
01S
OSI
VERS
~
~
~
~
1
1
5
111101
91
8
61
5
1
4
1
3
1
2
01
f f
f
02S
AUXCUR
PMECLK
Figure 17-53. Power Management Capabilities Register (PCICO_PMC)
15:11
PMES
PME
Support
The
PCI
bridge does
not
support
PME#;
therefore,
PMES
is
hardwired
to
ObOOOOO.
10
D2S
D2
Support
The
PCI
bridge does not support
the
D2
Determines
if
the
D2
power management power management state; therefore,
D2S
state
is
supported.
is
hardwired
to
O.
9
D1S
D1
Support
The
PCI
bridge supports
the
D1
power
Determines
if
the
D1
power management management state; therefore,
D1
S
is
state
is
supported. hardwired
to
1.
8:6
AUXCUR
Auxiliary Current Support
The
PCI
bridge does not support
Aux_Current; therefore,
AUXCUR
is
hardwired
to
ObOOO.
5
DSI
Device
Specific Initialization
This
bit indicates whether special
o after
reset
initialization
of
this function
is
required
(beyond
the
standard
PCI
configuration
header)
before
the
generic class
device
driver
is
able
to
use
it.
4
...
. Reserved
Always
read
as
O.
I··.·
..
3
PMECLK
This
bit
is
hardwired
to
0 indicating that
the
function does not support
PME#
generation
in
any
state.
2:0
VERS
Returns
Ob01
0
on
reads,
indicating that
PMC
complies
with
Revision
1.1
of
PCI
Power
Management Interface
Specification.
17.5.3.33 Power Management Control/Status Register (PCICO_PMCSR)
PCICO_PMCSR is used to manage the PCI power management state and to enable and monitor
PMEs.
17-50 PPC405GP User's
Manual
Preliminary