EMACO_RWMR[RLWM]), a new internal request for a pause packet transmission, with a zero pause
timer
value, is activated. EMAC sends a pause packet, with a zero pause timer value, only once, and
only if a pause packet with a non-zero value
in
the pause timer was transmitted earlier.
To
MAL
Receive FIFO
r
Packet 0
~
Iv-
WaterMark
launch
Pause
Packet 1
Packet
·
·
·
[
r-
~,
Packet n
Water Mark
i
From Ethernet MAC Sub-block
Figure 19-9. Integrated Flow Control Mechanism
19.5.4
Control
Packet Reception
In
the receive path, EMAC can be configured to respond to pause packets, or ignore them, as
specified by the
allow pause packet bit
in
Mode Register 1 (EMACO_MR1 [APP]). When response to
pause packets is
enabled and EMAC detects a valid MAC control packet with a Pause opcode, EMAC
stores the
value of the Timer Value field. The received packet is considered a valid control packet only
if no error was detected during the packet reception.
If,
at the end of packet reception, the packet is
considered
valid, EMAC launches a pause operation state machine, as specified in the IEEE P802.3x
standard. Figure 19-10 on page 19-18 illustrates the pause operation state machine.
If a control (pause) packet is received while another packet is being transmitted, the ongoing
transmission process is
completed and the transmitter is paused. If other packets are
in
the Transmit
FIFO, their transmission is delayed until the pause timer has expired. EMAC normally does not pass
Preliminary
Ethernet Media Access Controller
19-17
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