IBM PowerPC 405GP

3.11.3 Arithmetic Instructions
Arithmetic operations are performed on integer operands stored in GPRs. Instructions that perform
operations on two operands are defined
in a three-operand format; an operation is performed on the
operands, which are stored
in two GPRs. The result is placed in a third, operand, which is stored in a
GPR. Instructions that perform operations on one operand are defined using a two-operand format;
the operation is performed on the operand
in a GPR and the result is placed in another GPR. Several
instructions also have immediate formats
in which an operand is contained in a field in the instruction
word.
Most arithmetic instructions have versions that can update
CR[CRO] and XER[SO, OV], based on the
result of the instruction. Some arithmetic instructions also update XER[CA] implicitly. See
"Condition
Register (CR)" on page 3-12 and "Fixed Point Exception Register (XER)" on page 3-8 for more
information. .
Table 3-24 lists the
PPC405GP arithmetic instructions. In the table, the syntax "[0]" indicates that an
instruction has an
"0" form that updates XER[SO,OV], and a "non-a" form. The syntax "[.]" indicates
that the instruction has a
"record" form that updates CR[CRO], and a "non-record" form.
Table 3-24. Arithmetic Instructions
Add
Subtract
Multiply
Divide
Negate
add[o][.]
subf[o][.]
mulhw[.]
divw[o][.]
neg[o][.]
addc[o][.]
subfc[o][.] mulhwu[.] divwu[o][.]
adde[o][.]
subfe[o][.]
mUIii
addi
subfic mullw[o][.]
addic[.]
subfme[ 0 ][.]
addis
subfze[ 0 ][.]
addme[o][.]
addze[o][.]
Preliminary Programming Model 3-49