IBM PowerPC 405GP User Manual

SO CA
TBC
t +
+
241
25 31
1
f
ov
Figure 3-5. Fixed Point Exception Register (XER)
0 SO Summary Overflow
Can
be set by mtspr or by using "0" form
o No overflow has occurred.
instructions; can be
reset by mtspr or by
1
Overflow has occurred.
mcrxr.
1
OV Overflow
Can
be set by mtspr or by using "0" form
o No overflow has occurred.
instructions; can be
reset by mtspr, by
o Overflow has occurred.
mcrxr, or
"0" form instructions.
2
CA
Carry Can be set by mtspr or arithmetic
o Carry has not occurred.
instructions that update the
CA field; can
1 Carry has occurred.
be
reset by mtspr, by mcrxr, or by
arithmetic instructions that update the
CA
field.
3:24
1<'· :.: .:.
Reserved
I, :., .'.
25:31 TBC Transfer Byte Count
Used
by Iswx and stswx; written by mtspr.
Table 3-3 and Table 3-4 list the PPC405GP instructions that update the XER. In the tables, the syntax
"[0]" indicates that the instruction has an "0" form that updates XER[SO,OV], and a "non-o" form. The
syntax
"[.]" indicates that the instruction has a "record" form that updates CR[CRO] (see "Condition
Register (CR)" on page 3-12), and a
"non-record" form.
Table 3-3. XER[CA] Updating Instructions
Integer Processor
Integer Arithmetic Shift Control
Shift
Right Register
Add Subtract Algebraic
Management
addc[o][.] subfc[o][.] sraw[.]
mtspr
adde[o][.] subte[o][.] srawi[.] mcrxr
addlc[.] subtlc
addme[o][.] subfme[o][.]
addze[o][.]
subfze[o][.]
3-10 PPC405GP User's Manual Preliminary

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English