IBM PowerPC 405GP User Manual

Figure 11-3 illustrates the TBU.
1
0
Figure 11-3. Time Base Upper (TBU)
Time Base Upper
Current count, high-order 32 bits of time
base.
31
1
Table 11-1 summarizes the TBRs, instructions used to access the TBRs, and access restrictions.
Table 11-1.
Time Base Access
Register
Instructions
Number
Access Restrictions
mftbu RT Ox10D
Read-only
TBU
Extended mnemonic for
Upper
mftb RT,TBU
32
bits
mttbu RS Ox11D
Privileged; write-only
Extended mnemonic for
mtspr TBU,RS
mftb RT Ox10C
Read-only
TBl
Extended mnemonic for
lower
mftb RT,TBl
32 bits
mttbl Ox11C
Privileged; write-only
Extended mnemonic for
mtspr TBl,RS
11.1.1 Reading the Time Base
The following code provides an example of reading the time base. mftb moves the low-order 32 bits
of the time base to a GPR;
mftbu moves the high-order 32 bits of the time base to a second GPR.
loop:
mftbu Rx
mftb Ry
mftbu Rz
cmpw
Rz, Rx
bne loop
# load from TBU
# load from TBl
# load from TBU
# see if old = new
# loop/reread if rollover occurred
The comparison and loop ensure that a consistent pair of values is obtained.
11.1.2 Writing the Time Base
The following code provides an example of writing the time base. Writing the time base is privileged.
mttbl moves the contents of a GPR to the low-order 32 bits of the time base; mttbu moves the
contents of a second GPR to the high-order 32 bits of the time base.
Preliminary
Timer Facilities
11-3

IBM PowerPC 405GP Specifications

General

Brand	IBM
Model	PowerPC 405GP
Category	Computer Hardware
Language	English