12.9.8 Branch Taken Debug Event
This debug event occurs before execution of a branch instruction determined
to
be taken.
If
DBCRO[IDM] =
1,
DBCRO[EDM] = 0 and MSR[DE]
=0
this debug event is disabled.
12.9.9 Exception Taken Debug Event
This debug event occurs after an exception. Exception debug events always include the non-critical
class
of exceptions. When DBCRO[IDM] = 1 and DBCRO[EDM] = 0 the critical exceptions are not
included.
12.9.10 Trap Taken Debug Event
This debug event occurs before execution of a trap instruction where the conditions are such that the
trap
will occur. When trap is enabled for a debug event, external debug mode is enabled, internal
debug mode is enabled with MSR[DE] enabled,
or
debug wait mode is enabled, a trap instruction will
not cause a program exception.
12.9.11 Unconditional Debug Event
This debug event occurs immediately upon being set by the JTAG debug port.
12.9.12 lAC Debug Event
This debug event occurs before execution of an instruction at an address that matches an address
defined by the
Instruction Address Compare Registers (lAC1-IAC4). DBCRO[IA1, IA2, IA3, IA4]
enable lAC
debug events lAC can be defined as an exact address comparison to one of the IACn
registers or on a range of addresses to compare defined by a pair of IACn registers.
12.9.12.1
lAC Exact Address Compare
In
this mode each IACn register specifies an exact address to compare. These are enabled by setting
DBCRO[IAn] = 1 and disabling lAC range compare (DBCRO[IA 12X] = 0 for
IAC1
and IAC2 and
DBCRO[IA23X] = 0 for IAC3 and IAC4). The corresponding DBSR[IAn] bit displays the results of the
debug event.
12.9.12.2 lAC Range Address Compare
In
this mode a pair of IACn registers are used to define a range of addresses
to
compare:
Range 1:2 corresponds to
IAC1
and IAC2
Range 3:4 corresponds to IAC3 and IAC4
To
enable Range 1 :2, DBCRO[IA 12] = 1 and DBCRO[IA 1]
or
DBCRO[IA2] =1.
An
lAC event will be
seen on the
DBSR[IAn] field that corresponds to the enabled DBCRO[IAn] field. If DBCRO[IA 1] and
DBCRO[IA2] are enabled, the results of the event are reported on both DBSR fields. Setting
DBCRO[IA
12]
=1
prohibits
IAC1
and IAC2 from being used for exact address compares.
To
enable Range 3:4, DBCRO[IA34] = 1 and DBCRO[IA3]
or
DBCRO[IA4] =1.
An
lAC event will be
seen on the
DBSR[IAn] field that corresponds to the enabled DBCRO[IAn] field. If DBCRO[IA3] and
DBCRO[IA4] are enabled, the results of the event will be reported on both DBSR fields. Setting
DBCRO[IA34]
=1
prohibits IAC3 and IAC4 from being used for exact address compares.
Preliminary Debugging
12-17
To Next Page
Loading...
Need help?
General
