Table 10-1.
UIC
Interrupt Assignments (continued)
Interrupt
Polarity
Sensitivity
Interrupt
Source
3
High Edge
External Master
4 High
Level
PCI
5 High Level DMA Channel 0
6 High Level DMA Channel 1
7 High
Level
DMA Channel 2
8
High
Level DMA Channel 3
9
High
Level Ethernet Wake Up
10 High
Level MAL System Error (SERR)
11
High
Level MAL TX End of Buffer (TXEOBO)
12 High Level MAL RX End of Buffer (RXEOB)
13
High
Level MAL TX Descriptor Error (TXDE)
14
High
Level MAL RX Descriptor Error (RXDE)
15 High
Level Ethernet
16 High
Level External PCI SERR
17 High
Level ECC Correctable Error
18 High
Level
PCI
Power Management
19
...
...
..
20
21
Reserved
22
23
โขโขโข
...
24
......
.
....
,
,
..
. .
25 Programmabl
Programmabl ExternallRO 0
e
e
26
Programmabl Programmabl ExternallRO 1
e e
27
Programmabl Programmabl ExternallRO 2
e e
28
Programmabl Programmabl ExternallRO 3
e e
29
Programmabl Programmabl External I RO 4
e
e
30 Programmabl Programmabl ExternallRO 5
e e
31
Programmabl Programmabl ExternallRO 6
e e
10-2 PPC405GP User's Manual
Preliminary