IBM PowerPC 405GP

10 IA12
Instruction Address Range Compare
1-2
Registers IAC1 and IAC2 define an
o Disabled
address range used for lAC address
1
Enabled
comparisons.
11 IA12X
Enable Instruction Address Exclusive
Selects the range defined by IAC1 and
Range Compare
1-2
IAC2 to be inclusive or exclusive.
o Inclusive
1 Exclusive
12
IA3
lAC 3 Debug Event
o Disabled
1
Enabled
13
IA4
lAC 4 Debug Event
o Disabled
1
Enabled
14
IA34
Instruction Address Range Compare
3-4
Registers IAC3 and IAC4 define an
o Disabled address range used for lAC address
1
Enabled
comparisons.
15
IA34X
Instruction Address Exclusive Range
Selects range defined by IAC3 and IAC4 to
Compare
3-4
be inclusive or exclusive.
o Inclusive
1 Exclusive
16
IA12T
Instruction Address Range Compare 1-2
Toggles range 12 inclusive, exclusive
Toggle
DBCR[IA
12X] on debug event.
o Disabled
1
Enable
17 IA34T
Instruction Address Range Compare
3-4
Toggles range 34 inclusive, exclusive
Toggle
DBCR[IA34X]
on debug event.
o Disabled
1 Enable
18:30
..
Reserved
31 FT Freeze timers on debug event
o Timers not frozen
1 Timers frozen
12-10
PPC405GP User's Manual
Preliminary