The example
in
Figure 19-14 shows that the received individual address maps into category 24, and
that bit 8
in
EMACO_IAHT2 is set. The match indication is activated and the packet should be
accepted.
o
16
Destination Address
1516
31
16
CRC
Generator
When Match
=
1,
Packet is accepted.
When Match
=
0,
Packet is rejected.
Individual Address Filter
31
32
31
16
47
48
31
16
32-Bit Resultant CRC
o 5
6
Select
Figure 19-14. Ethernet Address Filter
Op~ration
63
31
Individual Address Filter
o 63
I I
Match
19.7 EMAC Registers
This section describes the EMAC registers. The EMAC registers are accessed through the OPB.
Access to the registers should be word-aligned.
Table 19-5. EMAC Register Summary
Power-on
Register Name Address
Write Access
Reset
Value Access Page
EMACO_MRO
OxEF600800 See description
in
"Scenario
1"
OxCOOOOOOO
RIW 19-27
on
page 19-45
EMACO_MR1
OxEF600804
Reset
OxOOOOOOOO
RIW
19-25
EMACO_TMRO
OxEF600808 See description
on
page 19-27
OxOOOOOOOO
RIW 19-27
EMACO_TMR1
OxEF60080C See description
on
page 19-28
Ox380FOOOO
RIW
19-28
EMACO_RMR
OxEF600810 Reset
OxOOOOOOOO
RIW
19-29
EMACO_ISR
OxEF600814 Always
OxOOOOOOOO
RIW
19-30
Note:
Refer
to
"Power-Up and Initialization"
on
page 19-44 for definitions of letters
in
the
Write Access Mode
column.
Preliminary Ethernet Media Access Controller 19-23