20.7 MAL Programming Notes
The following sections contain information about programming the MAL.
20.7.1 MAL Initialization
MAL initialization includes two parts: configuration and channel activation.
Configuration
involves two steps:
• MAL configuration - This step is done only after a power on reset or after a MAL soft reset. The
following registers are involved:
- Configuration. Register (MALO_CFG). This register defines MAL operation on the PLB and OPB.
- Interrupt Enable Register (MALO_IER). This register is used to enable interrupts for various MAL
error conditions.
• Channel specific configuration - This information may be changed only when the associated
channel is not active. (The bit for the channel
in
the
TX
or
RX Channel Active Set Register, is
cleared.) The following registers are involved:
- MALO_RCBSx - RX Buffer Size (one register for each RX channel). This register defines the
length of the RX buffers in memory.
-
MALO_ TXCTPxR or MALO_RXCTPxR - Channel Table Pointer Register (one register for each
channel). This register is programmed with the memory address of the first buffer descriptor
table entry for the channel.
Setting
the channel specific configuration can be done as part of MAL initialization or as part of the
COM MAC initialization process. In order to activate a channel, the following actions should be taken:
• The channel has to be configured in MAL
• The related bit
in
Channel Active Set Register (MALO_ TXCASR
or
MALO_RXCASR) has to be set
• The channel operation must be enabled (COMMAC configuration)
20.7.2 Interrupts
MAL has five interrupt lines (in the PPC405GP, all are connected to the UIC).
Two
interrupt lines, one
for
TX
and one for RX, are used for interrupt events during packet transfer. An additional two interrupt
lines, one for TX and one for RX, are used to report descriptor errors on a per-channel basis. The fifth
interrupt is used to report MAL errors.
• TXEOB interrupt line is used to report end of buffer or end of packet for a specific TX channel. A bit
for the
related channel is set in the MALO_ TXEOBISR. See "End of Buffer Interrupt Status
Registers"
on
page 20-28.
• RXEOB
interrupt line is used to report end of buffer
or
end of packet for a specific RX channel. A bit
for the
related channel is set
in
th'e
MALO_RXEOBISR. See "End of Buffer Interrupt Status
Registers" on page 20-28.
•
TXDE interrupt line is used to indicate a descriptor error event in a specific
TX
channel descriptor
table. A bit for the related channel is asserted in the MALO_ TXDEIR. See "Descriptor Error
Interrupt Registers (MALO_ TXDEIR, MALO_RXDEIR)" on page 20-32.
20-18 PPC405GP User's Manual Preliminary
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