Table 3-6. Directly Accessed DCRs (continued)
OCR
Register
Number
Access
Description
Direct
Memory
Access
DMAO_CRO Ox100
RIW
DMA Channel Control Register 0
DMAO_CTO
Ox101
RIW DMA Count Register 0
DMAO_DAO
Ox102
RIW
DMA Destination Address Register 0
DMAO_SAO
Ox103
RIW
DMA Source Address Register 0
DMAO_SGO
Ox104
RIW
DMA Scatter/Gather Descriptor Address Register 0
DMAO_CR1
Ox108 RIW
DMA Channel Control Register 1
DMAO_CT1 Ox109
RIW
DMA Count Register 1
DMAO_DA1
Ox10A
RIW
DMA Destination Address Register 1
DMAO_SA1 Ox10B
RIW
DMA Source Address Register 1
DMAO_SG1
Ox10C RIW
DMA Scatter/Gather Descriptor Address Register 1
DMAO_CR2
Ox110 RIW
DMA Channel Control Register 2
DMAO_CT2
Ox111
RIW
DMA Count Register 2
DMAO_DA2
Ox112
RIW
DMA Destination Address Register 2
DMAO_SA2 Ox113
RIW
DMA Source Address Register 2
DMAO_SG2 Ox114
RIW
DMA Scatter/Gather Descriptor Address Register 2
DMAO_CR3 Ox118
RIW
DMA Channel Control Register 3
DMAO_CT3 Ox119
RIW
DMA Count Register 3
DMAO_DA3
Ox11A
RIW
DMA Destination Address Register 3
DMAO_SA3 Ox11B
RIW
DMA Source Address Register 3
DMAO_SG3
Ox11C
RIW
DMA Scatter/Gather Descriptor Address
DMAO_SR
Ox120
R/Clear DMA Status Register
DMAO_SGC
Ox123
RIW
DMA Scatter/Gather Command Register
DMAO_SLP
Ox125 RIW
DMA Sleep Mode Register
DMAO_POL
Ox126
RIW
DMA Polarity Configuration Register
Media
Access
Layer
MALO_CFG
Ox180
RIW
MAL Configuration Register
MALO_ESR
Ox181
R/Clear Error Status Register
MALO_IER
Ox182
RIW
Interrupt Enable Register
MALO_ TXCASR
Ox184 RIW
Tx Channel Active Register (Set)
MALO_ TXCARR Ox185
RIW
Tx
Channel Active Register (Reset)
MALO_ TXEOBISR Ox186
R/Clear Tx End of Buffer Interrupt Status Register
MALO_ TXDEIR Ox187
R/Clear Tx Descriptor Error Interrupt Register
MALO_RXCASR
Ox190 RIW
Rx Channel Active Register (Set)
MALO....:RXCARR
Ox191
RIW Rx Channel Active Register (Reset)
MALO_RXEOHISR
Ox192
R/Clear
Rx End of Buffer
Interrupt Status Register
MALO_RXDEIR
Ox193
R/Clear
Rx Descriptor Error
Interrupt Register
MALO_ TXCTPOR
Ox1AO
RIW
Channel Tx 0 Channel Table Pointer Register
MALO_ TXCTP1 R
Ox1A1
RIW
Channel
Tx
1 Channel Table Pointer Register
MALO_RXCTPOR
Ox1CO
RIW
Channel Rx 0 Channel Table Pointer Register
MALO_RCBSO
Ox1EO
RIW
Channel RX 0 Channel Buffer Size Register
3-18
PPC405GP User's Manual Preliminary