SDRAM Controller Configuration and Status ..... .................. ......... ........ ..... ............. ....... ....... ............ ............ 15-3
Memory Controller Configuration Register (SDRAMO_CFG) .................................................................... 15-3
Memory Controller
Status (SDRAMO_STATUS) .....
...
.... ......... ...... ...................... ........... ........ ..... ....... ....... 15-5
Memory Bank
0-3
Configuration (SDRAMO_BOCR-SDRAMO_B3CR) ...............
...
........... ....
...
.......... ...... 15-6
Page Management .......................................................................................................................... ; .......... 15-7
Logical Address to Memory Address Mapping . ......
...
....... ...... ........... ...... ................ .... .................
...
......... 15-8
SDRAM Timing Register (SDRAMO_ TR) .................................................................................. ................ 15-9
Selected Timing Diagrams ...................................................................................................................... 15-10
Auto
(CAS Before RAS) Refresh ............................................................................................................ 15-13
Refresh Timer Register (SDRAMO_RTR) ............................................................................................... 15-13
Error Checking and Correction (ECC) ......................................................................................................... 15-14
ECC Configuration Register (SDRAMO_ECCCFG) ................................................................................ 15-14
Correctable ECC Errors ........... ..... .................................. ............. .......................... .... ............
...
... ....... .... 15-15
Uncorrectable ECC Errors ...................................................................................................................... 15-15
Error Locking ........................................................................................................................................... 15-16
ECC Error Status Register (SDRAMO_ECCESR) .................................................................................. 15-16
Bus Error Address Register (SDRAMO_BEAR) ...................................................................................... 15-17
Bus Error Syndrome Register
° (SDRAMO_BESRO) .............................................................................. 15-17
Bus Error Syndrome Register 1
(SDRAMO_BESR1) .............................................................................. 15-18
Self-Refresh ................................................................................................................................................. 15-19
Power Management ....................................................................... , ....... ................. .... ....... ........ ........ ..... .... 15-20
Sleep Mode Entry ................................. ............... ......... ......... ..... ......
...
................... .......... ..... .......... ....... 15-20
Power Management Idle Timer (SDRAMO_PMIT) .................................................................................. 15-20
Sleep Mode Exit ...................................................................................................................................... 15-21
Chapter 16. External Bus Controller .................................................................................. 16-1
Interface Signals ............................................................................................................................................
16-1
Interfacing to Byte, Halfword and Word Devices ....................................................................... ............... 16-3
Multiplexed II0s
..
..... ...... ........... .........
....
............ ..... .............. ........
....
...... ....
....
.....
....
.......
...
............... ........ 16-4
Driver
Enables
..
....... .....
...
.... .............. ....... ............... ......... ............. .... ..... ........... ............... ......... ......... ...... 16-4
Non-Burst
Peripheral Bus Transactions . .................. ............. ......... .... .... ..... ....... ...... ......... ..... ................. ...... 16-5
Single Read Transfer ................................................................. , .....................
,.
..... ...... ................. ........... 16-6
Single Write Transfer ................................................................................................................................ 16-7
Burst Transactions .....................................................................................................................
, ...... ..........
...
16-8
Burst Read Transfer ......................... ......................................................................................................... 16-9
Burst Write Transfer ................................................................................................................................ 16-10
Device-Paced Transfers ............................................................. ; ................................................................
16-11
Device-Paced Single Read Transfer ....................................................................................................... 16-12
Device-Paced Single Write Transfer ....................................................................................................... 16-13
Device-Paced Burst Read Transfer ........................................................................................................ 16-14
Device-Paced Burst Write Transfer ........................................................................................................ 16-15
External Bus Master Interface ..................................................................................................................... 16-17
Arbitration ................. ......... .......... ........... ....... ................ .... ....... ...... .... ........ ................... ................. ..... .... 16-17
Transaction Overview ................................................................................................................... :..... .... 16-19
Single Read and Single Write Transfers ......... ................ ...... ......
...
....... .... ........... ........... ... ..... ....... ..... .... 16-19
Burst Read Transfer ................................................................................................................................ 16-20
Burst Write Transfer ................................................................................................................................ 16-21
External Master Error Interrupts.. ..... ........ .......
...
........... ..... ......... ........... ........ .... ............. ........ ....... ......
...
16-22
EBC Registers . .... ......... ........... ............... ....... ..... ............... ............... ........ .............. ............. ...... .......... .... .... 16-23
EBC Configuration Register (EBCO_CFG) ............................................................................................. 16-23
Peripheral Bank Configuration Registers (EBCO_BnCR) ............................................................ : .......... 16-25
Peripheral Bank Access Parameters (EBCO_BnAP) ..... ........ ..... ......
...
................. ............. .... ...... ....... .... 16-26
Error Reporting
...
........... ............ ................. ................. .......... ..... ..............
...
...... ........... .......... .......... ........... 16-29
Error Locking ............................................... : ........................................................................................... 16-29
Peripheral Bus Error Address Register (EBCO_BEAR) ...... .......... ....... ........... ........ ............... ........... ...... 16-29
Peripheral Bus Error Status Register ° (EBCO_BESRO) ........................................................... ............. 16-30
xII
PPC405GP User's Manual
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