Chapter 20. Memory Access Layer ....................................................................................
20-1
MAL Features ................................................................................................................................................
20-1
MAL - Internal Structure ........................................................................................................................... 20-3
PLB Master ........................................................................................................................................... 20-3
OPB
Master .......................................................................................................................................... 20-3
TX Channel Handler ............................................................................................................................. 20-3
RX Channel Handler ............................................................................................................................ : 20-3
TX Channel Arbiter ............................................................................................................................... 20-4
RX
Channel Arbiter ............................................................................................................................... 20-4
TX Common Channel Logic .................................................................................................................. 20-4
RX Common Channel Logic ................................................................................................................. 20-4
Register Map File .................................................................................................................................. 20-4
Transmit and Receive Operations ................................................................................................................. 20-4
Buffer Descriptor Overview ............................................................................................................................ 20-7
Transmit Software Interface ........................................................................................................................... 20-9
Wrapping the BD Table for Transmit ....................................................................................................... 20-10
Continuous Mode for Transmit ................................................................................................................ 20-10
Back Up a Packet for Transmit ................................................................................................................ 20-10
Descriptor Not Valid for Transmit .................................................................................................... : ....... 20-11
Scroll
Descriptors for Transmit ................................................................................................................ 20-11
Receive Software Interface .......................................................................................................................... 20-12
Wrapping the BD Table for Receive ........................................................................................................ 20-12
Continuous Mode for Receive ................................................................................................................. 20-12
Descriptor Not Valid for Receive ............................................................................................................. 20-13
Buffer Length for Receive ........................................................................................................................ 20-13
Descriptor Buffer Status/Control Fields ........................................................................................................ 20-13
Information
from a Software Device Driver Directed To MAL and COMMAC ......................................... 20-13
Information
from MAL and COMMAC Directed to Software .................................................................... 20-14
Status/Control Field Handling
.................................................................................................................. 20-14
Status/Control Field
Format .................................................................................................................... 20-14
TX Status/Control Field Format ............................................................................................................... 20-15
Bit 0 - R - Ready ................................................................................................................................ 20-15
Bit 1 - W - Wrap ................................................................................................................................. 20-15
Bit 2 - CM - Continuous Mode ........................................................................................................... 20-15
Bit 3 - L - Last .................................................................................................................................... 20-15
Bit 4 - Reserved ........... : ..................................................................................................................... 20-16
Bit 5 - I - Interrupt .............................................................................................................................. 20-16
Bits 6 to 15 .......................................................................................................................................... 20-16
RX
Status/Control Field Format .............................................................................................................. 20-16
Bit 0 - E - Empty ................................................................................................................................ 20-16
Bit 1 - W - Wrap ................................................................................................................................. 20-17
Bit 2 - CM - Continuous Mode ........................................................................................................... 20-17
Bit 3 - L - Last .................................................................................................................................... 20-17
Bit 4 - F - First ................................................................................................................................... 20-17
Bit 5 - I - Interrupt .............................................................................................................................. 20-17
Bits 6 to 15 .............................................................................................................................. ............ 20-17
MAL Programming Notes ............................................................................................................................. 20-18
MAL Initialization ..................................................................................................................................... 20-18
Interrupts
................................................................................................................................................. 20-18
Error Handling ......................................................................................................................................... 20-19
Error Detection .................................................................................................................................... 20-19
Indicated
Errors .................................................................................................................................. 20-19
Error Handling Registers ..................................................................................................................... 20-20
Operational
Error Modes .................................................................................................................... 20-21
Resolution
of an Error Situation ........................................................................................................... 20-21
Interrupts
To Software ........................................................................................................................ 20-23
Preliminary
Contents
xvii