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IBM PowerPC 405GP - Page 573

IBM PowerPC 405GP
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The MAL Scroll Descriptor
in
the configuration register is clear:
In
this case MAL will read the Status word from the COMMAC channel. Then MAL will terminate
the current
channel service by resetting the READY bit of the last processed buffer descriptor (the
one
in
which there was an early termination) and will write the status only to this descriptor. On the
next service of this
channel, MAL will fetch the next descriptor
in
the current packet.
In
this case,
the software is
responsible to monitor the MAL location
in
the buffer descriptor table.
In
the case that the COMMAC requests a re-transmit of the early terminated packet (when the
"backup" bit
in
the COMMAC status is set), MAL will re-transmit the packet regardless of the MAL
Scroll Descriptor bit.
20.5 Receive Software Interface
MAL uses the RX channel buffer descriptors
in
a manner similar to that used for transmission. Once
an RX
COMMAC channel requests that a new packet be processed, MAL starts processing the
channel's next buffer descriptor
in
the table. Once a channel is enabled
in
MAL, the channel may
request MAL service. When it does, MAL accesses the first buffer descriptor (in that
channel's buffer
descriptor
table) that is pointed to by the COMMAC channel table pointer register.
If
that descriptor is
ready (empty for RX), MAL will start processing the buffer.
When
it
begins processing each packet, MAL writes the contents of the status/control field into the
COMMAC. This information (defined by COMMAC's implementation) can be used by the COMMAC
for a per-packet configuration.
Once data is received from the memory, MAL moves the data from the RX
channel FIFO into the data
buffer pointed to by the first buffer descriptor. The current buffer descriptor may be
closed for two
reasons: there is no more room
left
in
the buffer,
or
the COMMAC channel indicated that the packet
reception ended.
If additional buffering space is needed for the current packet, MAL moves on to the
next buffer descriptor. As each buffer descriptor is
closed, MAL updates the length field with the actual
amount of bytes written into the buffer. The maximal length of the buffers for each channel is defined
by a configuration register. The
maximal receive buffer length is defined per channel.
Once the COMMAC channel indicates that the packet reception has ended, it is expected to request
that MAL update the received packet status
in
the SD status/control field. MAL updates the packet
status and notifies the
COMMAC. At this point the packet is considered received and the COMMAC
may request that MAL begin the process of receiving a new packet. The first buffer of the next packet
is the buffer
in
the SD table that followed the last descriptor of the previous packet.
20.5.1 Wrapping the
BO
Table for Receive
When MAL processes the buffer descriptor, it may encounter a Wrap indication within a buffer
descriptor
control field. This causes MAL to go back to the head of the channel's buffer descriptor for
the next buffer descriptor. This
also happens when MAL reaches the maximal number of descriptors.
20.5.2 Continuous Mode for Receive
After using a buffer descriptor, MAL sets the buffer descriptor control to the Not-Empty state.
In
this
way,
MAL will not use the same buffer descriptor a second time until the software has processed the
not-empty buffer descriptor and set it to Empty again. MAL
will not clear the Empty bit while the
Continuous Mode (CM) bit is set
in
the status/control field. The Continuous Mode is generally used by
20-12
PPC405GP
User's
Manual
Preliminary

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