protocols where frequent collisions are an integral part of the protocol itself (forcing the COMMAC to
abort a reception process and restart).
In
such cases, re-reception can be performed without software
intervention.
20.5.3 Descriptor Not Valid for Receive
When MAL accesses a buffer descriptor it may find that the Empty bit is not set. In the case of an RX
channel descriptor, this situation is considered as a descriptor error. MAL deactivates the channel and
from its point of view, the processing of the current packet has ended. Software may
learn about this
situation from one of two MAL interrupts (or from both):
• An RXDE interrupt with the MALO_RXDEIR indicating which channel caused the interrupt
• An SERR interrupt (system error) with one interrupt bit for all channels
in
the MALO_ESR
For more about error
handling, see "Error Handling"
on
page 20-19.
20.5.4 Buffer Length for Receive
The maximum length of an RX buffer descriptor is predetermined for all RX descriptors
in
each
channel. The data-length value is programmable through a set of MAL registers (see "MAL Registers"
on page 20-24). The actual data length field within the RX buffer descriptor is written by MAL. If the
buffer is
completely filled
up,
the value written will match the value programmed into the matching
RX-Channel-Descriptor
data-length register. If the buffer is only partially filled
up
(for example, when
the RX packet ended before running out of buffer space), the
actual amount of space filled is written
into the
length field.
20.6 Descriptor Buffer Status/Control Fields
The following sections details the status/control field bits. The information fields within the
status/control
field can be divided as follows:
• Information
from a software device driver directed to MAL and COM MAC
• Information from MAL and COMMAC directed to software
• Status/control field handling
•
Status/control field format
• TX status/control field format
• RX status/control field format
20.6.1 Information from a Software Device Driver Directed
To
MAL and COMMAC
• MAL-related buffer descriptor processing information:
- Buffer Ready/Not Ready (determines the buffer's
validity).
- Wrap to top of table
or
continue to next descriptor.
-
In
a transmit buffer descriptor - Is the current buffer the last one
in
the packet?
- Continuous
or
normal mode; that
is,
should MAL change the Ready/Not Ready value?
Preliminary
Memory Access Layer
20-13
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