DCU Debugging ........................................................................................................................................ 4-15
DCU Performance ......................................................................................................................................... 4-16
Pipeline
Stalls ........................................................................................................................................... 4-16
Cache Operation Priorities ........................................................................................................................ 4-17
Simultaneous Cache Operations ............. ................................................................................................. 4-18
Sequential Cache Operations ................................................................................................................... 4-18
Chapter 5. On-Chip Memory ..................................................................................................
5-1
OCM Addressing ................. .......... ...................... ..................................... .......................................................
5-1
OCM Programming Guidelines ............................................. ......... .......................... .................. ...................... 5-2
Store Data Bypass Behavior and Memory Coherency...... ...................................... ........................................ 5-3
Registers ................ ..................................................................................... .................................................... 5-5
OCM Instruction-Side Address Range Compare Register (OCMO_ISARC) ............................................... 5-5
OCM Instruction-Side Control Register (OCMO_ISCNTL) .......................................................................... 5-6
OCM Data-Side Address Range Compare Register (OCMO_DSARC) ...................................................... 5-6
OCM Data-Side Control Register (OCMO_DSCNTL) ................ ...................................... ........................... 5-7
Chapter 6.
Memory
Management ..........................................................................................
6-1
MMU Overview ................................................................................................................................................
6-1
Address Translation.............................................. ....................................... ....................................................
6-1
Translation Lookaside Buffer (TLB) ................................................................................................................. 6-2
Unified TLB ................. ......................................................................................................................... ....... 6-2
TLB Fields ................................................ ............................ ............................... ........................................ 6-3
Page Identification Fields .... ................... ................................................................................................ 6-3
Translation Field .................................................................................. ................................................... 6-4
Access Control Fields.................................. ....................................... .................................................... 6-5
Storage Attribute Fields .......................................................................................................................... 6-5
Shadow
Instruction TLB ..................................................................................................................... : ......... 6-6
ITLB Accesses .............................................................................................................................. ......... 6-6
Shadow Data TLB ....................................................................................................................................... 6-7
DTLB Accesses ...................................................................................................................................... 6-7
Shadow TLB Consistency ........................... ........................................ ........... ........................... ............. 6-8
TLB-Related
Interrupts ...................................................................... .............................................................. 6-9
Data Storage
Interrupt
.~
.............................................................................................................................. 6-9
Instruction Storage Interrupt .....................................................................................................................
6-1
ยฐ
Data TLB Miss Interrupt ............................................................................................................................ 6-10
Instruction
TLB Miss Interrupt ................................................................................................................... 6-10
TLB Management ..........................................................................................................................................
6-1
ยฐ
TLB Search Instructions (tlbsxltlbsx.) ........................................................................ : ..............................
6-11
TLB Read/Write Instructions (tJbre/tlbwe) .................................................................................................
6-11
TLB Invalidate Instruction (tibia) ...............................................................................................................
6-11
TLB Sync Instruction (tlbsync) .................................................................................................................. 6-11
Recording Page References and Changes ...................................................................................................
6-11
Access Protection .......................................................................................................................................... 6-12
Access Protection Mechanisms
in
the TLB ............................................................................................... 6-12
General Access Protection ................................................................................................................... 6-12
Execute Permissions .......................................................................... ....................................... ........... 6-13
Write
Permissions ....... : ........................................................................................................................ 6-13
Zone Protection .................................................................................................................................... 6-13
Access Protection for Cache Control
Instructions ..................................................................................... 6-15
Access Protection for String
Instructions ...................... .................. ........ .................................................. 6-16
Real-mode Storage Attribute Control ............................................................................................................ 6-17
Storage Attribute Control Registers .......................................................................................................... 6-18
Data Cache Write-through Register (DCWR) ....................................................................................... 6-18
Data Cache Cachability Register (DCCR) ............................................................................................ 6-19
Instruction Cache Cachability Register (ICCR) .................................................................................... 6-19
Storage Guarded Register (SGR) ........................................................................................................ 6-19
viii PPC405GP User's Manual
Preliminary