Storage
User-defined
0
Register
(SUOR)
............................................................................................. 6-19
Storage
Little-Endian
Register
(SLER) ................................................................................................. 6-19
Part III. PPC405GP System Operations ...............................................................................
111-1
Chapter 7. Clocking ...............................................................................................................
7-1
PLL
Overview
...................................................................................................................................................
7-1
Input
Reference
Clock
(SysClk)
....................................................................................................................... 7-2
External
Clock
Strapping
Setup
....................................................................................................................... 7-3
Sample
Clock
Ratios
........................................................................................................................................ 7-4
PCI
Clocking
.................................................................................................................................................... 7-7
PCI
Clocks
................................................................................................................................................... 7-8
PCI
Adapter
Applications
............................................................................................................................ 7-8
Serial
Port
Clocking
......................................................................................................................................... 7-9
Clocking
Registers
........................................................................................................................................... 7-9
PLL
Mode
Register
(CPCO_PLLMR)
......................................................................................................... 7-10
Chip
Control
Register
0
(CPCO_CRO)
.......................................................................................................
7-11
Chapter 8. Reset and Initialization ........................................................................................
8-1
Reset
Signals
...................................................................................................................................................
8-1
Reset
Types
.............................................................................................................................. .......................
8-1
Core
Reset
..................................................................................................................................................
8-1
Chip
Reset
...................................................................................................................................................
8-1
System
Reset
.............................................................................................................................................. 8-2
PCI
Power
Management
Initiated
Resets
........................................................................................................ 8-2
Processor
Initiated
Resets
............................................................................................................................... 8-2
Processor
State
After
Reset
............................................................................................................................ 8-2
Processor
Register
Contents
After
Reset
........................................................................................................ 8-3
Machine
State
Register
Contents
after
Reset
............................................................................................. 8-3
Contents
of
Special
Purpose
Registers
after
Reset
.................................................................................... 8-4
OCR
Contents
after
Reset
............................................................................................................................... 8-4
MMIO
Register
Contents
After
Reset .............................................................................................................. 8-8
PPC405GP
Chip
Initialization
........................................................................................................................ 8-12
OCM
Initialization
...................................................................................................................................... 8-13
Initializing
Instruction-Side
OCM ........................................................................................................... 8-13
Initializing
Data-Side
OCM
.................................................................................................................... 8-13
UIC
Initialization
........................................................................................................................................ 8-14
UART
Initialization
..................................................................................................................................... 8-14
PPC405GP
Initial
Processor
Sequencing
............................................. : ........................................................ 8-14
Initialization
Requirements
............................................................................................................................. 8-15
Initialization
Code
Example
............................................................................................................................ 8-16
Chapter
9.
Pin Strapping and Sharing .................................................................................
9-1
Pin
Strapping
...................................................................................................................................................
9-1
Chip
Pin
Strapping
Register
(CPCO_PSR) ..................................................................................................
9-1
Pin
Sharing
...................................................................................................................................................... 9-3
Chapter 10. Interrupt Controller Operations ...................................................................... 10-1
UIC
Overview
.................................................................................................................................................
10-1
UIC
Features
..................................................................................................................................................
10-1
UIC
Interrupt
Assignments
.................................................................................................................... : ........
10-1
Interrupt
Programmability
............................................................................................................................... 10-3
UIC
Registers
................................................................................................................................................. 10-3
UIC
Status
Register
(UICO_SR)
................................................................................................................ 10-3
UIC
Enable
Register
(UICO_ER)
............................................................................................................... 10-6
UIC
Critical
Register
(UICO_CR)
............................................................................................................... 10-8
UIC
Polarity
Register
(UICO_PR)
............................................................................................................ 10-10
UIC
Trigger
Register
(UICO_TR)
............................................................................................................. 10-13
Preliminary
Contents
ix