Sharp LH79524 - Page 17

Version 1.0 xv
List of Figures
Preface
Figure 1. Multiplexer...............................................................................................xxxviii
Figure 2. Register with Bit-Field Named.................................................................. xxxix
Figure 3. Register with Multiple Bit-Fields Named .................................................. xxxix
Figure 4. Register with Bit-Field Numbered ............................................................ xxxix
Chapter 1 – Overview
Figure 1-1. LH79524/LH79525 Block Diagram ..........................................................1-2
Figure 1-2. Standard Clocking Modes........................................................................1-6
Figure 1-3. Fastbus Clocking Mode ...........................................................................1-7
Figure 1-4. Reset Circuit for TAP Controller...............................................................1-9
Figure 1-5. Reset Circuit for TAP Controller Including a Push Button......................1-10
Figure 1-6. Active Pullup Circuit...............................................................................1-11
Chapter 2 – Analog-to-Digital Converter/Brownout Detector
Figure 2-1. ADC Block Diagram.................................................................................2-2
Figure 2-2. Bias-and-Control Network Block Diagram ...............................................2-4
Figure 2-3. Simplified N-bit SAR Architecture............................................................2-5
Figure 2-4. Example of a 4-bit SAR ADC Operation ..................................................2-6
Figure 2-5. Use of the BATCNTL Pin.........................................................................2-7
Chapter 3 – Boot Controller
Figure 3-1. Boot Controller Block Diagram.................................................................3-1
Figure 3-2. Active Pullup Circuit.................................................................................3-5
Chapter 4 – Color Liquid Crystal Display Controller
Figure 4-1. LH79524/LH79525 LCD System, Simplified Block Diagram....................4-1
Figure 4-2. Block Diagram of a Typical Advanced LCD Panel...................................4-2
Figure 4-3. Color LCD Controller Block Diagram.......................................................4-4
Figure 4-4. LCD Panel Power Sequencing ..............................................................4-15
Figure 4-5. ALI Simplified Block Diagram.................................................................4-17
Figure 4-6. STN Horizontal Timing Diagram ............................................................4-43
Figure 4-7. STN Vertical Timing Diagram ................................................................4-44
Figure 4-8. TFT Horizontal Timing Diagram.............................................................4-45
Figure 4-9. TFT Vertical Timing Diagram.................................................................4-46
Figure 4-10. AD-TFT, HR-TFT Horizontal Timing Diagram......................................4-47
Figure 4-11. AD-TFT, HR-TFT Vertical Timing Diagram..........................................4-47
Chapter 5 – Direct Memory Access Controller
Figure 5-1. Basic DMA Timing ...................................................................................5-4
Chapter 6 – Ethernet MAC Controller
Figure 6-1. EMAC Block Diagram..............................................................................6-2
Figure 6-2. Address Matching..................................................................................6-15