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ARM Cortex-A76 Core

ARM Cortex-A76 Core
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B2.14 AIDR_EL1, Auxiliary ID Register, EL1
AIDR_EL1 provides IMPLEMENTATION DEFINED identification information. This register is not used in the
A76 core.
Bit field descriptions
AIDR_EL1 is a 32-bit register, and is part of:
The Identification registers functional group.
The IMPLEMENTATION DEFINED functional group.
This register is Read Only.
031
RES0
Figure B2-10 AIDR_EL1 bit assignments
RES0, [31:0]
Reserved, RES0.
Configurations
There are no configuration notes.
Bit fields and details that are not provided in this description are architecturally defined. See the
Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
B2 AArch64 system registers
B2.14 AIDR_EL1, Auxiliary ID Register, EL1
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
B2-155
Non-Confidential

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