ARM Cortex-A76 Core

B2.46 ERXSTATUS_EL1, Selected Error Record Primary Status Register, EL1
Register ERXSTATUS_EL1 accesses the ERR<n>STATUS primary status register for the error record
selected by ERRSELR_EL1.SEL.
If ERRSELR_EL1.SEL==0, then ERXSTATUS_EL1 accesses the ERR0STATUS register of the core
error record. See B3.10 ERR0STATUS, Error Record Primary Status Register on page B3-307.
If ERRSELR_EL1.SEL==1, then ERXSTATUS_EL1 accesses the ERR1STATUS register of the DSU
error record. See the Arm
®
DynamIQ
™
Shared Unit Technical Reference Manual.
B2 AArch64 system registers
B2.46 ERXSTATUS_EL1, Selected Error Record Primary Status Register, EL1
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