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ARM Cortex-A76 Core

ARM Cortex-A76 Core
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D9.54 TRCPIDR0, ETM Peripheral Identification Register 0
The TRCPIDR0 provides information to identify a trace component.
Bit field descriptions
The TRCPIDR0 is a 32-bit register.
31 0
78
Part_0
RES0
Figure D9-52 TRCPIDR0 bit assignments
RES0, [31:8]
RES0 Reserved.
Part_0, [7:0]
0x0B Least significant byte of the ETM trace unit part number.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCPIDR0 can be accessed through the external debug interface, offset 0xFE0.
D9 ETM registers
D9.54 TRCPIDR0, ETM Peripheral Identification Register 0
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-564
Non-Confidential

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