ARM Cortex-A76 Core

B2.50 HACR_EL2, Hyp Auxiliary Configuration Register, EL2
HACR_EL2 controls trapping to EL2 of IMPLEMENTATION DEFINED aspects of Non-secure EL1 or EL0
operation. This register is not used in the Cortex-A76 core.
Bit field descriptions
HACR_EL2 is a 32-bit register, and is part of Virtualization registers functional group.
031
RES0
Figure B2-37 HACR_EL2 bit assignments
RES0, [31:0]
Reserved, RES0.
Configurations
There are no configuration notes.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
B2 AArch64 system registers
B2.50 HACR_EL2, Hyp Auxiliary Configuration Register, EL2
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B2-211
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