ARM Cortex-A76 Core

D7.9 PMSSCR, PMU Snapshot Capture Register
The PMSSCR provides a mechanism for software to initiate a sample.
Bit field descriptions
The PMSSCR is a 32-bit write-only register.
31 0
1
RES0
SS
Figure D7-3 PMSSCR bit assignments
RES0, [31:1]
Reserved, RES0.
SS, [0]
Capture now. The possible values are:
0 Ignored.
1 Initiate a capture immediately.
Configurations
There are no configuration notes.
Usage constraints
Any access to PMSSCR returns an error if any of the following occurs:
• The core power domain is off.
• DoubleLockStatus() == TRUE.
D7 PMU snapshot registers
D7.9 PMSSCR, PMU Snapshot Capture Register
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