ARM Cortex-A76 Core

D9.49 TRCCNTVRn, Counter Value Registers 0-1
The TRCCNTVRn contains the current counter value.
Bit field descriptions
The TRCCNTVRn is a 32-bit register.
31 16 15 0
VALUE
RES0
Figure D9-47 TRCCNTVRn bit assignments
RES0, [31:16]
RES0 Reserved.
VALUE, [15:0]
Contains the current counter value.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCNTVRn registers can be accessed through the external debug interface, offsets:
TRCCNTVR0
0x160.
TRCCNTVR1
0x164.
D9 ETM registers
D9.49 TRCCNTVRn, Counter Value Registers 0-1
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
D9-559
Non-Confidential