ARM Cortex-A76 Core User Manual

A4.2 Voltage domains
The Cortex-A76 core supports a VCPU voltage domain and a VSYS voltage domain.
The following figure shows the VCPU and VSYS voltage domains in each Cortex-A76 core and in the
DSU. The example shows a configuration with four Cortex-A76 cores.
Core 0
DSU
Core 1 Core 2 Core 3
VCPU0
VCPU1
VSYS
VCPU3
VCPU2
Figure A4-1 Cortex-A76 Voltage Domains
Asynchronous bridge logic exists between the voltage domains. The Cortex-A76 core logic and core
clock domain of the asynchronous bridge are in the VCPU voltage domain. The DSU clock domain of
the asynchronous bridge is in the VSYS voltage domain.
Note
You can tie VCPU and VSYS to the same supply if one of the following conditions is met:
• The core is configured to run synchronously with the DSU sharing the same clock.
• The core is not required to support DVFS.
A4 Power management
A4.2 Voltage domains
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ARM Cortex-A76 Core Specifications

General

Architecture	ARMv8.2-A
Microarchitecture	Cortex-A76
Pipeline Depth	13 stages
Frequency	Up to 3.0 GHz
Process Technology	7nm
Core Type	Out-of-order
NEON	Yes
Power Efficiency	Improved over Cortex-A75
Performance Improvement	35% over Cortex-A75
Core Count	1-4 cores per cluster
ISA Support	AArch64 and AArch32
Branch Prediction	Yes
L1 Data Cache	32KB, per core
L2 Cache	256KB or 512KB, per core
L3 Cache	Up to 4MB
Memory Support	LPDDR4, LPDDR4X, DDR4
DynamIQ Shared Unit (DSU)	DynamIQ Shared Unit (DSU)
Cryptography Extensions	Yes
Virtualization Support	Yes
L1 Cache	64 KB per core