ARM Cortex-A76 Core

D9.70 TRCTRACEIDR, Trace ID Register
The TRCTRACEIDR sets the trace ID for instruction trace.
Bit field descriptions
The TRCTRACEIDR is a 32-bit register.
31 0
TRACEID
67
RES0
Figure D9-67 TRCTRACEIDR bit Assignments
RES0, [31:7]
RES0 Reserved.
TRACEID, [6:0]
Trace ID value. When only instruction tracing is enabled, this provides the trace ID.
Bit fields and details not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCTRACEIDR can be accessed through the external debug interface, offset 0x040.
D9 ETM registers
D9.70 TRCTRACEIDR, Trace ID Register
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D9-581
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