ARM Cortex-A76 Core

B2.63 ID_AFR0_EL1, AArch32 Auxiliary Feature Register 0, EL1
The ID_AFR0_EL1 provides information about the IMPLEMENTATION DEFINED features of the PE in
AArch32. This register is not used in the Cortex-A76 core.
Bit field descriptions
ID_AFR0_EL1 is a 32-bit register, and is part of the Identification registers functional group.
This register is Read Only.
031
RES0
Figure B2-47 ID_AFR0_EL1 bit assignments
RES0, [31:0]
Reserved, RES0.
Configurations
There are no configuration notes.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm
®
Architecture Reference Manual Armv8, for Armv8-A architecture profile.
B2 AArch64 system registers
B2.63 ID_AFR0_EL1, AArch32 Auxiliary Feature Register 0, EL1
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B2-230
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