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ARM Cortex-A76 Core

ARM Cortex-A76 Core
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B4.5 ICC_BPR0_EL1, Interrupt Controller Binary Point Register 0, EL1
ICC_BPR0_EL1 defines the point at which the priority value fields split into two parts, the group
priority field and the subpriority field. The group priority field determines Group 0 interrupt preemption.
Bit field descriptions
ICC_BPR0_EL1 is a 32-bit register and is part of:
The GIC system registers functional group.
The GIC control registers functional group.
31
0
2
3
BinaryPoint
RES0
Figure B4-1 ICC_BPR0_EL1 bit assignments
RES0, [31:3]
Reserved, RES0.
BinaryPoint, [2:0]
The value of this field controls how the 8-bit interrupt priority field is split into a group priority
field, that determines interrupt preemption, and a subpriority field. The minimum value that is
implemented is:
0x2
Bit fields and details that are not provided in this description are architecturally defined. See the Arm
®
Generic Interrupt Controller Architecture Specification.
B4 GIC registers
B4.5 ICC_BPR0_EL1, Interrupt Controller Binary Point Register 0, EL1
100798_0300_00_en Copyright © 2016–2018 Arm Limited or its affiliates. All rights
reserved.
B4-317
Non-Confidential

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